Although Windows is not real time OS, you still can good latency by change serial FIFO settings. FIFO is a small buffer in UART including Tx/Rx 2 differnet directions. To optimize the performance, Rx FIFO has a Rx trigger design including 1/4/8/14 bytes options. "Trigger" means when the UART needs to issue interrupt to CPU/driver the rx data is ready. In default value 14, driver will get interrupt each time the RX FIFO has 14 bytes in it. But if the data lentgh in FIFO is smaller 14, when the UART will issue interrupt? The answer is timeout. This is depend on UART design. But this will cause the bad latency if your input data is always smaller than trigger level.
To avoid this problem, disable FIFO or set the Rx FIFO size to 1 - this means driver will get interrupt for each input byte. Your program can get input data ASAP.
In old Age, this is also very useful for old UART in Xon/Xoff flow control setting. As you know, driver needs to get Xoff character ASAP to know when it should stop tx if the connected device Rx buffer is almost full. If UART has FIFO, this will delay the Xoff action and cause the connected device overrun. But for modern UARTs, they have on-chip Xon/Xoff flow control and it will immedately stop tx while Xoff is received. The xoff latency is not problem any more. For example, Moxa Serial Device Connectivity Products use the Moxa powered UART - MU860/MU150 with on-chip Xon/Xoff flow control can avoid the Xoff latency problem.